1. Field of the Invention
The present invention relates to an encoding apparatus and method for error correction which is applied to record, for instance, audio PCM signals onto a magnetic tape by rotary heads and, more particularly, to an apparatus and method for error correction which is provided in a digital encoder to record high quality audio PCM data, as disclosed in U.S. Pat. No. 4,551,771.
2. Description of the Background Art
There is a known error correction encoding apparatus and method for use with information symbols arranged two-dimensionally in a matrix form in which encoding processes of error detection and error correction codes, e.g., Reed-Solomon codes are executed in each of the vertical and lateral directions of the information symbols. These codes are transmitted for each column (referred to as a block) in the vertical direction. On the reception side, the error correction is performed by using a first error detection and error correction code (referred to as a C1 code or sometimes referred to herein as a first error detection code) and, at the same time, a pointer indicative of the presence or absence of errors is formed. Next, the errors are corrected by a second error detection and error correction code (referred to as a C2 code or sometimes referred to herein as a second error detection code) again with reference to this pointer.
In the case where the foregoing error correction encoded data is transmitted for each block, a block of data is constructed by the addition of a synchronization signal and a header consisting of auxiliary data such as a block address, a time code, etc. to the block. A two-dimensional arrangement is constructed by a plurality of blocks. Since redundancy increases when block addresses are added to all blocks, e.g., 100 blocks, it is desirable that block addresses should be contained in a part of some blocks and auxiliary data, etc., should be inserted into a corresponding part of other blocks by omitting the block addresses.
For example, in U.S. Pat. No. 4,630,272, there is shown a method whereby a sync signal and an address in which error detection can be independently performed by a CRC code are added to each column of data and to the parity data of a C1 code, thereby forming one block. In this method, as shown in FIG. 1A herein, for the address, the error detection can be executed by the CRC code and for the data portion (PCM audio signals), encoding processes of a first error correction code (the C1 code) and a second error correction code (the C2 code) are performed. In the case of the encoding in FIG. 1A, however, since the C1 code is not applied to the address, the protection against errors is insufficient.
To solve this problem, for example, as disclosed in U.S. Pat. No. 4,682,332 and as shown herein in FIG. 1B, an error correction encoding is proposed in which an encoding by a C1 code is also executed for the address.
When a header consists of only an address, the error correction encoding shown in FIG. 1B is useful. However, if PCM audio signals (main data) are included in the header in addition to the address, the encoding by the C1 code is only executed for the main data and there is a problem in that the protection for errors is insufficient for a reason to be mentioned later. Encoding by the C2 code of the whole header, including the address, to eliminate this drawback causes an inconvenience in that the data area in which the addresses are recorded is lost by the existence of the C2 parity.
To solve such a problem, as shown in FIG. 1C, the invention of the present patent application proposes an error correction encoding apparatus in which a whole header together with a data portion is C1 encoded and the encoding of a C2 code is performed for the main data included in the header, excluding addresses, thereby enabling adequate error protection for the main data included in the header, so that the main data can be recorded into the header part. The insertion of audio data into the header facilitates the adjustment of asynchronization between a picture which is reproduced from the tape and an audio sound by varying the number of audio data words which are included in a frame of data area. This error correction encoding apparatus is suitable when it is used in what is called an 8-mm VTR as disclosed in U.S. Pat. No. 4,551,771 in which both a video signal of one field and audio PCM signals of one field, i.e., time base compressed audio PCM signals are recorded on a magnetic tape by a signal scan.
In the already commercialized 8-mm VTR, the sampling frequency of the audio PCM signals is selected to be 2f.sub.h (f.sub.h : horizontal frequency). Therefore, the rotary heads which rotate at a frame frequency and the sampling system are synchronized, and the problem of asynchronization between an image and an audio sound does not occur. However, there is a problem in that the sampling frequency of the conventional 8-mm VTR is too low with respect to that necessary for audio signals of a high quality to be recorded and reproduced. In addition, there is a problem in the absence of matching the sampling frequencies (44.1 kHz, 48 kHz, 32 kHz, etc.) which are used in other digital audio apparatuses such as CD players and rotary head type digital audio tape recorders (R-Dats). Therefore, it is preferable to be able to use those frequencies (44.1 kHz, 48 kHz, 32 kHz, etc.) as the sampling frequency of the audio PCM signals in the 8-mm VTR.
However, since the ratio between the above-mentioned frequency and, e.g., the field frequency (59.94 kHz) of the NTSC system is not an integer, the number of sampling data included in one field period is also not an integer. Therefore, when both a video signal and audio PCM signals are recorded on the same track, as in the 8-mm VTR, the problem of asynchronization between the video image and the corresponding audio sound may occur.
In this way, in the case where the sampling frequency cannot be evenly divided by a frequency of an encoded unit, for example, the field frequency, the sample number contained in one frame of a code structure varies by the number of plural ways close to the quotient of the division. Data processing on the reception side can be performed without any trouble by transmitting an identification signal indicative of the sample number. The foregoing PCM processor of 8-mm VTR is disclosed in U.S. patent application Ser. No. 262,523, now U.S. Pat. No. 4,953,168.
In the above-stated system, a two-symbol (16 bits) block address is inserted into a header, and a one-symbol block address is inserted into a block in which a one-symbol audio PCM signal is contained as auxiliary data. A block in which an audio PCM signal is included in a header is prescribed to have a block address of an odd-number i.e. whose least significant bit is "1". However, since the provision of one symbol of a block address to all blocks increases data redundancy, it is desirable to mix blocks having block addresses and blocks having data, such as an audio PCM signal other than an address, but having no block address. In this case, since no block address is added to the blocks in which data such as an audio PCM signal is inserted, it is impossible to distinguish a header content by the block address.
Therefore, the present invention identifies a header content by a redundant code of an error detection code which is added for an error detection of the block address, parity code Q, subcode and PCM signal included in the header only.
Although it is different from this invention, in one method utilizing a redundant code of an error detection code, one bit of the redundant code is allotted for identification. For example, one bit of an eight-bit redundant code is allotted for identification. In this system, since the remaining redundant code has seven-bits, one problem is that data processing in byte units becomes difficult. Also, when one bit of the eight-bits of redundant code is allotted to an identification bit, two kinds of headers corresponding to "0" and "1" can be identified.
By the allotment of two bits to identification bits, four kinds of headers corresponding to the four combinations of "0" and "1" can be identified. There are always a multiple of 2 kinds of headers available for identification. To identify three kinds, five kinds, etc., of headers, a system in which a partial bit of a redundant code is allotted to an identification bit is not possible and the next multiple of 2 must be used.